Layered Architecture for Quantum Computing
N. Cody Jones,1,* Rodney Van Meter,2 Austin G. Fowler,3 Peter L. McMahon,1 Jungsang Kim,4 Thaddeus D. Ladd,1,5 and Yoshihisa Yamamoto1,5
1 Edward L. Ginzton Laboratory, Stanford University, Stanford, California 94305-4088, USA 2 Faculty of Environment and Information Studies, Keio University, 5322 Endo, Fujisawa 252-0882, Japan 3 Centre for Quantum Computation and Communication Technology, University of Melbourne, Victoria 3010, Australia 4 Fitzpatrick Institute for Photonics, Duke University, Durham 27708, North Carolina, USA 5 National Institute of Informatics, 2-1-2 Hitotsubashi, Chiyoda-ku, Tokyo 101-8430, Japan
(Received 1 September 2011; revised manuscript received 5 April 2012; published 31 July 2012)
We develop a layered quantum-computer architecture, which is a systematic framework for tackling the individual challenges of developing a quantum computer while constructing a cohesive device design. We discuss many of the prominent techniques for implementing circuit-model quantum computing and introduce several new methods, with an emphasis on employing surface-code quantum error correction. In doing so, we propose a new quantum-computer architecture based on optical control of quantum dots. The time scales of physical-hardware operations and logical, error-corrected quantum gates differ by several orders of magnitude. By dividing functionality into layers, we can design and analyze subsystems independently, demonstrating the value of our layered architectural approach. Using this concrete hardware platform, we provide resource analysis for executing fault-tolerant quantum algorithms for integer factoring and quantum simulation, finding that the quantum-dot architecture we study could solve such problems on the time scale of days.
DOI: 10.1103/PhysRevX.2.031007
Subject Areas: Quantum Physics, Quantum Information
ncodyjo???@gmail.com
Published by the American Physical Society under the terms of the Creative Commons Attribution 3.0 License. Further distribution of this work must maintain attribution to the author(s) and the published article’s title, journal citation, and DOI.
I. INTRODUCTION
Quantum computing as an engineering discipline is still in its infancy. Although the physics is well understood, developing devices that compute with quantum mechanics is technologically daunting. While experiments to date manipulate only a handful of quantum bits [1], we consider what effort is required to build a large-scale quantum computer. This objective demands more than a cursory estimate of the number of qubits and gates required for a given algorithm. One must consider the faulty quantum hardware, with errors caused by both the environment and deliberate control operations; the classical processing required when error correction is invoked; the special treatment required for constructing arbitrary gate sequences from a limited fault-tolerant set; and so on. This paper provides a framework for addressing the complete challenge of designing a quantum computer. Many researchers have presented and examined components of large-scale quantum computing. We study here how these components may be combined in an efficient design, and we introduce new methods that improve the quantum computer we propose. This engineering pursuit is quantum-computer architecture, which we develop here in layers. An architecture decomposes complex system behaviors into a manageable set of operations. A layered architecture does this through layers of abstraction where each layer embodies a critical set of related functions. For our purposes, each ascending layer brings the system closer to an ideal quantum-computing environment. The paper is organized as follows. The remainder of Sec. I provides a global view of a layered quantumcomputer architecture, indicating how the topics we examine are connected to each other. Section II enumerates the essential components of a quantum computer by examining a new hardware platform based on the optical control of quantum dots. Section III discusses control techniques for suppressing hardware errors prior to using active error correction. Section IV demonstrates how to implement and account for the resources of quantum error correction, with particular emphasis on the surface code [2]. Section V analyzes the necessary techniques for constructing universal quantum gates from the limited set of operations provided by error correction. Section VI calculates the computer resources necessary to implement two prominent quantum algorithms: integer factoring and quantum simulation. Section VII discusses timing issues that affect how the layers in the architecture interact with each other. Finally, Section VIII discusses how our findings are applicable to future work in quantum computing.
A. Prior work on quantum-computer architecture
Many different quantum-computing technologies are under experimental investigation [1], but for each a scalable system architecture remains an open research
problem. Since DiVincenzo introduced his fundamental criteria for a viable quantum-computing technology [3], and Steane emphasized the difficulty of designing systems capable of running quantum error correction (QEC) adequately [4,5], several groups of researchers have outlined various additional taxonomies addressing the architectural needs of large-scale systems [6,7]. As an example, small-scale interconnects have been proposed for many technologies, but the problems of organizing subsystems using these techniques into a complete architecture for a large-scale system have been addressed by only a few researchers. In particular, the issue of heterogeneity in system architecture has received relatively little attention. The most important subroutine in fault-tolerant quantum computers considered thus far is the preparation of ancilla states for fault-tolerant circuits, because these circuits often require very many ancillas. Taylor et al. proposed a design with alternating ‘‘ancilla blocks’’ and ‘‘data blocks’’ in the device layout [8]. Steane introduced the idea of ‘‘factories’’ for creating ancillas [9], which we examine for the case of the surface code in this work. Isailovic et al. [10] studied this problem for ion-trap architectures and found that, for typical quantum circuits, approximately 90% of the quantum computer must be devoted to such factories in order to calculate ‘‘at the speed of data,’’ or where ancilla production is not the ratelimiting process. The findings we present here are in close agreement with this estimate. Metodi et al. also considered production of ancillas in ion-trap designs, focusing instead on a 3-qubit ancilla state used for the Toffoli gate [11], which is an alternative pathway to a universal fault-tolerant set of gates. Some researchers have studied the difficulty of moving data in a quantum processor. Kielpinski et al. proposed a scalable ion-trap technology utilizing separate memory and computing areas [12]. Because quantum error correction requires rapid cycling across all physical qubits in the system, this approach is best used as a unit cell replicated across a larger system. Other researchers have proposed homogeneous systems built around this basic concept. One common structure is a recursive H tree, which works well with a small number of layers of a Calderbank-ShorSteane code, targeted explicitly at ion-trap systems [13,14]. Oskin et al. [15], building on the Kane solid-state NMR technology [16], proposed a loose lattice of sites, explicitly considering the issues of classical control and movement of quantum data in scalable systems, but without a specific plan for QEC. In the case of quantum computing with superconducting circuits, the quantum von Neumann architecture specifically considers dedicated hardware for quantum memories, zeroing registers, and a quantum bus [17]. Long-range coupling and communication is a signifi- cant challenge for quantum computers. Cirac et al. proposed the use of photonic qubits to distribute entanglement between distant atoms [18], and other researchers have investigated the prospects for optically mediated nonlocal gates [19–23]. Such photonic channels could be utilized to realize a modular, scalable distributed quantum computer [24]. Conversely, Metodi et al. consider how to use local gates and quantum teleportation to move logical qubits throughout their ion-trap Quantum Logic Array architecture [11]. Fowler et al. [25] investigated a Josephson-junction flux-qubit architecture considering the extreme difficulties of routing both the quantum couplers and large numbers of classical control lines, producing a structure with support for CalderbankShor-Steane codes and logical qubits organized in a line. Whitney et al. [26,27] have investigated automated layout and optimization of circuit designs specifically for ion-trap architectures, and Isailovic et al. [10,28] have studied interconnection and data-throughput issues in similar ion-trap systems, with an emphasis on preparing ancillas for teleportation gates [29]. Other work has studied quantum-computer architectures with only nearest-neighbor coupling between qubits in an array [30–34], which is appealing from a hardware design perspective. With the recent advances in the operation of the topological codes and their desirable characteristics such as having a high practical threshold and requiring only nearest-neighbor interactions, research effort has shifted toward architectures capable of building and maintaining large two- and three-dimensional cluster states [35–38]. These systems rely on topological errorcorrection models [39], whose higher tolerance to error often comes at the cost of a larger physical system, relative to, for example, implementations based on the Steane code [40]. The surface code [2], which we examine in this work for its impact on architecture, belongs to the topological family of codes. Recent attention has been directed at distributed models of quantum computing. Devitt et al. studied how to distribute a photonic cluster-state quantumcomputing network over different geographic regions [41]. The abstract framework of a quantum multicomputer recognizes that large-scale systems demand heterogeneous interconnects [42]; in most quantum-computing technologies, it may not be possible to build monolithic systems that contain, couple, and control billions of physical qubits. Van Meter et al. [43] extended this architectural framework with a design based on nanophotonic coupling of electron-spin quantum dots that explicitly uses multiple levels of interconnect with varying coupling fidelities (resulting in varying purification requirements), as well as the ability to operate with a very low yield of functional devices. Although that proposed system has many attractive features, concerns about the difficulty of fabricating optical components of adequately high quality and the desire to reduce the
lattice cycle time of the surface code led to the system design proposed in this paper.
B. Layered framework
A good architecture must have a simple structure while also efficiently managing the complex array of resources in a quantum computer. Layered architectures are a conventional approach to solving such engineering problems in many fields of information technology, and Ref. [14] presents a layered software architecture for designing quantum computers. Our architecture, which describes the physical design of the quantum computer, consists of five layers, where each layer has a prescribed set of duties to accomplish. The interface between two layers is defined by the services a lower layer provides to the one above it. To execute an operation, a layer must issue commands to the layer below and process the results. Designing a system this way ensures that related operations are grouped together and that the system organization is hierarchical. Such an approach allows quantum engineers to focus on individual challenges, while also seeing how a process fits into the overall design. By organizing the architecture in layers, we deliberately create a modular design for the quantum computer. The layered framework can be understood by a control stack composed of the five layers in the architecture. Figure 1 shows an example of the control stack for the quantum-dot architecture we propose here, but the particular interfaces between layers will vary according to the physical hardware, quantum error-correction scheme, and so on, that one chooses to implement. At the top of the control stack is the Application layer, where a quantum
algorithm is implemented and results are provided to the user. The bottom Physical layer hosts the raw physical processes supporting the quantum computer. The layers between (Virtual, Quantum Error Correction, and Logical) are essential for shaping the faulty quantum processes in the Physical layer into a system of highaccuracy, fault-tolerant [44] qubits and quantum gates at the Application layer.
C. Interaction between layers
Two layers meet at an interface, which defines how they exchange instructions or the results of those instructions. Many different commands are being executed and processed simultaneously, so we must also consider how the layers interact dynamically. For the quantum computer to function efficiently, each layer must issue instructions to layers below in a tightly defined sequence. However, a robust system must also be able to handle errors caused by faulty devices. To satisfy both criteria, a control loop must handle operations at all layers simultaneously while also processing syndrome measurement to correct errors that occur. A prototype for this control loop is shown in Fig. 2. The primary control cycle defines the dynamic behavior of the quantum computer in this architecture since all operations must interact with this loop. The principal purpose of the control cycle is to successfully implement quantum error correction. The quantum computer must operate fast enough to correct errors. Still, some control operations necessarily incur delays, so this cycle does not simply issue a single command and wait for the result before proceeding—Pipelining is essential [10,45]. A related issue is that operations in different layers occur on drastically different time scales, as discussed later in Sec. VII. Figure 2 also describes the control structure needed for the quantum computer. Processors at each layer track the current operation and issue commands to lower layers. Layers 1 through 4 interact in the loop, whereas the Application layer interfaces only with the Logical layer, since it is agnostic about the underlying design of the quantum computer (which is explained in Sec. VI).
D. The QuDOS hardware platform
The layered framework for quantum computing was developed in tandem with a specific hardware platform, known as QuDOS (quantum dots with optically controlled spins). The QuDOS platform uses electron spins within quantum dots for qubits. The quantum dots are arranged in a two-dimensional array; Fig. 3 shows a cutaway rendering of the quantum-dot array inside an optical microcavity, which facilitates control of the electron spins with laser pulses. We demonstrate that the QuDOS design is a promising candidate for large-scale
quantum computing, beginning with an analysis of the hardware in the Physical layer.
II. LAYER 1: PHYSICAL
The essential requirements for the Physical layer are embodied by the DiVincenzo criteria [3], but we are also interested in performance of the quantum hardware. The time scale of operations and the degrees of errors, both systematic and random, are critical parameters that determine the size and speed of the computer. This section discusses the essential hardware components of a quantum computer, accompanied by the QuDOS platform we introduce as an example. We conclude by analyzing the performance of the QuDOS hardware. We caution that many of the required hardware elements are still under experimental development, but we choose those discussed below as examples to establish time scales that will affect higher layers of the architecture.
A. Physical qubit
A quantum computer must have the ability to store information between processing steps; the object fulfilling this role is conventionally known as the physical qubit. A physical qubit may be more complex than a two-level system, and this issue is addressed by Layer 2 in the architecture, where control operations are used to form a true quantum bit as an information unit (see Sec. III A). Examples of physical qubits include trapped ions, photonpolarization modes, electron spins, and quantum states in superconducting circuits [1]. The remainder of the Physical layer is devoted to controlling and measuring the physical qubit. The layered-architecture design is flexible in the sense that the Physical layer can be tailored to a specific hardware, such as superconducting circuit qubits, with minimal change to higher layers such as error correction. The physical qubit we consider in QuDOS is the spin of an electron bound within an InGaAs self-assembled quantum dot (QD) surrounded by GaAs substrate [46–51]. These QDs can be optically excited to trion states (a bound electron and exciton), which emit light with a wavelength of approximately 900 nm when they decay. A transverse magnetic field splits the spin levels into two metastable ground states [52], which will later form a two-level system for a virtual qubit in Layer 2. The energy separation of the spin states is important for two reasons related to controlling the electron spin: First, the energy splitting facilitates control with optical pulses, as explained in Sec. II C. Second, there is continuous phase rotation between spin states j "i and j #i around the z axis on the qubit Bloch sphere, which in conjunction with timed optical pulses provides complete unitary control of the electron spin vector.
B. Host system
For our purposes, the host system is the engineered environment of the physical qubit that supports computing. Examples include the trapping fields in ion-trap designs, the waveguides in optical quantum computing, and the diamond crystal surrounding nitrogen-vacancy centers [1]. The host system defines the immediate environment of the physical qubit, which will be important for characterizing noise that affects quantum operations. We noted above that, in QuDOS, the electron spin is bound within a quantum dot. These quantum dots are embedded in an optical microcavity, which will facilitate quantum-gate operations via laser pulses. To accommodate the two-dimensional array of the surface code detailed in Layer 3, this microcavity must be planar in design, so the cavity is constructed from two distributed Bragg reflector (DBR) mirrors stacked vertically with a =2 cavity layer between, as shown in Fig. 3. This cavity is grown by molecular-beam epitaxy. The QDs are embedded at the center of this cavity to maximize interaction with antinodes of the cavity field modes. Using molecular-beam epitaxy, high-quality (Q > 105) microcavities can be grown with alternating layers of GaAs=AlAs [53]. The nuclei in the quantum dot and surrounding substrate have nonzero spin, which is an important source of noise (see Sec. II F).
C. 1-qubit gate mechanism
The 1-qubit gate manipulates the state of a single physical qubit. This 1-qubit gate mechanism is still a physical process; only later will these physical control operations be combined into a ‘‘virtual gate’’ (see Sec. III B). Still, it is important that the Physical layer delivers sufficient control of the physical qubit. Full unitary control of a qubit requires at least two adjustable degrees of freedom, such as rotation around two axes on the Bloch sphere, and three freely adjustable parameters [54]. The 1-qubit operations in QuDOS are developed using a transverse magnetic field and ultrafast laser pulses [51–55]. The magnetic field provides a constant-angular-frequency rotation around the z axis, while laser pulses enact a power-dependent rotation around an orthogonal axis, which we label x. The first nonideal behavior we consider is that the laser pulse has some finite duration, so that x and z precession happen concurrently, which impairs manipulation of the spin Bloch vector. To remedy this, we introduce ‘‘Hadamard pulses’’ [56]: One tunes the laser pulse power and duration to make the pulse-driven x-axis rotation equal in angular frequency to the z-axis precession from the magnetic field, so that the axis of rotation becomes H¼ 1ffiffi 2 p ðxþzÞ. A ‘‘� pulse’’ around this axis is a Hadamard gate. By using two Hadamard pulses and rotation Rzð�Þ via free precession in the magnetic field, we can construct any x-axis rotation by Rxð�Þ ¼ H � Rzð�Þ � H, as shown in Fig. 4. By implementing Hadamard pulses, we can obtain high-fidelity operations LAYERED A
with pulses of finite duration. A challenging problem for QuDOS is how the system executes millions of control operations in parallel. We envision an optical imaging system consisting of an array of MEMS mirrors to individually steer laser control beams toward or away from quantum dots, along with electro-optic modulators to precisely control laser pulse timing. We discuss this approach in Appendix A, but rigorously engineering such a system is beyond our scope. D. 2-qubit gate mechanism The 2-qubit operation couples two physical qubits, which can generate entanglement. This mechanism is crucial for quantum computing, yet it is often difficult to implement experimentally. For example, entangling gates like CNOT are used frequently in quantum error correction, so developing fast, high-fidelity 2-qubit gate mechanisms is imperative for large-scale quantum information processing. In many cases, the 2-qubit gate is the process that defines the speed and accuracy of a quantum computer. The construction of a practical, scalable 2-qubit gate in QuDOS remains the most challenging element of the hardware, and various methods are currently under development. A fast 2-qubit gate, fully controlled optically, would certainly be attractive, and early proposals [47] identified the importance of employing the nonlinearities of cavity QED. Ref. [47] suggests the application of two lasers for both 1-qubit and 2-qubit control; more recent developments have indicated that both 1-qubit gates [55,57,58] and 2-qubit gates [59] can be accomplished using only a single optical pulse. We consider a 2-qubit gate via the dispersive interaction proposed in Ref. [59]. The critical figure of merit for the cavity QED system is the cooperativity factor C, which is proportional to the cavity quality factor Q divided by the cavity volume V. For QuDOS, we envision transverse cavity confinement entirely due to the extended microplanar microcavity arrangement, in which cooperativity factors are enhanced by the angle dependence of the cavity response, an effect that is enlarged by high index-ofrefraction contrast in the alternating mirrors of the DBR stack [46]. While existing cooperativity factors achieved this way are not estimated to be high enough to produce quantum gates with error rates sufficiently low for faulttolerant quantum computing, advanced control techniques and multispin encodings (such as for ‘‘virtual qubits’’; see Sec. III) may enable this technology to function with acceptable error rates. Ref. [59] estimates that this gate will require 10–100 ns to execute. For the present analysis we assume the value 32 ns, which coincides with a virtual gate in Sec. III B. Further enhancements to speed or gate fidelity or both may be available by introducing exchange interactions using microcavity polaritons [60]; studying this possibility is the subject of future work. E. Measurement readout Measurement is another essential component of quantum computing. At a bare minimum, one must be able to read the final result of a calculation, but typically measurement is used extensively in fault-tolerant quantum error correction. For this reason, quantum computers may require measurement that is comparable in speed and accuracy to the control operations. Moreover, many situations call for quantum nondemolition (QND) measurement, where the physical qubit is projected into an eigenstate of the measurement operator. To illustrate a counterexample, consider a qubit defined by the ground and the first optically excited states of a quantum dot. A possible measurement scheme is to detect a photon emission, which would indicate that the qubit was in the excited state. However, the final state of the qubit is the ground state for either measurement outcome, which is destructive measurement, so this procedure cannot be repeated. Conversely, QND measurement is highly desirable because it can be repeated, so that classical readout noise can be reduced by time averaging. QuDOS requires a QND measurement scheme which is still under experimental development. The proposed mechanism (shown in Fig. 5) is based on Faraday/Kerr rotation. The underlying physical principle is as follows: An off-resonant probe pulse impinges on a quantum dot, and the optical pulse receives a different phase shift depending on whether the quantum-dot electron is in the spin-up or spin-down state. (These states are separated in energy by the external magnetic field.) Sensitive photodetectors combined with homodyne-detection measure the phase shift to enact a projective QND measurement on the electron spin. Several results in recent years have demonstrated the promise of this mechanism for measurement:
multishot experiments by Berezovsky et al. [61] and Atatu¨re et al. [62] have measured spin-dependent phase shifts in charged quantum dots, and Fushman et al. [63] observed a large phase shift induced by a neutral quantum dot in a photonic crystal cavity. Most recently, Young et al. observed a significantly enhanced phase shift from a quantum dot embedded in a micropillar cavity [64]. F. Noise sources and errors Noise and decoherence are the biggest obstacles to scalable quantum computing. In general, the noise sources that corrupt the physical qubit or degrade the fidelity of control operations should be characterized as well as possible. For the present analysis, we consider the noisy environment for an electron spin in QuDOS. The primary noise in this system is dephasing, likely caused by the inhomogeneous distribution of nuclear spins in the quantum dot. The ensemble dephasing is characterized by T� 2 � 2 ns, while the intrinsic dephasing is characterized by T2 � 3 �s [65]. When the noise experienced by a qubit is dominated by dephasing, one can counteract decoherence with control sequences tailored to this noise source [66]. Section IIIA introduces a decoupling scheme designed specifically for QuDOS. G. Hardware performance summary We summarize the execution times for the essential Layer 1 (L1) operations in QuDOS in Table I. These are the quantum processes which are the building blocks of quantum information operations in Layers 2 and above. For a complete quantum processor, however, one would also have to consider the classical control hardware and the engineering concerns, such as delays, which may occur in a large system. For example, Ref. [34] considers the implications of classical control wires, such as routing concerns, signal timing, and the generation of heat in lowtemperature devices. Although engineering of classical control hardware is an important problem, it lies outside the scope of our present analysis, and we reserve it for future work. III. LAYER 2: VIRTUAL The Virtual layer is where quantum effects in the Physical layer are first cast into information primitives— virtual qubits and quantum gates. We use ‘‘virtual’’ as it is defined in the field of computer science, where a virtual object obeys a predetermined set of behaviors, without specifying the structure of this object. As an example, a virtual qubit may be defined by a decoherence-free subspace [67–69] constructed from three electron spins; when considered as a whole, three spins have many more degrees of freedom than a single qubit. Similar behavior is seen in the quantum gates in QuDOS, which actually consist of a
TABLE I. Parameters for Layer 1 quantum operations. Spin-phase precession is determined by the spin-state energy splitting due to
Operation | Mechanism | Duration | Notes
Spin-phase precession (�z axis) | Magnetic-field splitting of spin energy levels | 40 ps | Inhomogeneous nuclear environment causes spectral broadening in Larmor frequency, which is the source of T�2 processes.
Spin-state rotation pulse | Stimulated Raman transition with broadband optical pulse | 14 ps | Red-detuned from the ground-state–trion transitions of the spins
Entangling operation | Nonlinear phase shift of spin states via coupling to a common cavity mode | 32 ns | CW laser signal modulated by an electro-optic modulator (EOM)
QND measurement | Dispersive phase shift of light reflected from planar cavity | 1 ns | CW laser signal modulated by an EOM
sequence of laser pulses. This transcription process of converting many physical elements into a virtual information unit is the task of Layer 2, and we clarify the functions of this layer in this section. Figure 6 gives an overview of the Virtual layer processes in QuDOS. In a general sense, the Virtual layer makes the Physical layer robust to systematic errors. This effect is seen in both virtual qubits and gates, where we enforce symmetries in the system (by careful design of control operations) which cause correlated errors to cancel by interference. The simplest example of this behavior is the Hahn spin-echo sequence [70], and in fact decoupling techniques play a prominent role in how we construct a virtual qubit.
A. Virtual qubit
The virtual qubit shapes the underlying physical qubit into a two-level system which approximates an ideal qubit. However, the virtual qubit is modeled as having some finite amount of decoherence, such as the depolarizing channel [54]. Where applicable, dynamical decoupling [71–73] and/or decoherence-free subspaces [67–69] are used to create long-lived virtual qubits, and the residual decoherence characterizes the lifetime of the virtual qubit. In what follows, we consider how to construct a virtual qubit with a charged quantum dot, including the mitigation of several nonideal effects in this system. In QuDOS, the virtual qubit is created from the two metastable spin states of an electron confined to a QD. As discussed in Sec. II F, the raw physical system has dephasing time T� 2 � 2 ns [65] caused by an inhomogeneous distribution of nuclear spins in the environment of the electron. This dephasing time is insufficient for quantum error correction in Layer 3, so this system must be augmented with dynamical decoupling techniques [74,75], which extend the dephasing time of the virtual qubit into the microsecond regime [65]. Constructing the virtual qubit in QuDOS requires Layer 2 to conceal the complexity of controlling the QD spin state. Because the physical-qubit Bloch vector continuously rotates around the �z axis, control pulses must be accurately timed so that they perform the desired operation. Furthermore, control of the QD spin is complicated by the inhomogeneous nuclear-spin environment which causes the �z-axis rotation to proceed at a somewhat uncertain angular frequency. This problem is mitigated by a dynamical decoupling (DD) sequence, so that the system is decoupled from environmental noise and brought into a precisely controlled reference frame at a predictable time. Figure 7(a) illustrates the ‘‘8H’’ decoupling sequence (so named because it uses eight Hadamard pulses), which is appropriate for use in QuDOS. This control sequence is designed both to decouple a qubit from dephasing noise and to compensate for systematic pulse errors in the presence of a strong but slowly fluctuating drift term in the qubit Hamiltonian, which is the case for optically controlled quantum dots in a strong magnetic field. Although longer sequences consisting of more pulses may in theory decouple to higher fidelity, we have chosen a sequence of just eight Hadamard pulses to minimize execution time. Instead of using a more common sequence like the Carr-Purcell (CP) sequence [76,77] or Uhrig dynamical decoupling (UDD) [78], the sequence in Fig. 7 is custom designed to eliminate to first order the errors that occur in both the free evolution and the control of the virtual qubit. (CP and UDD cannot accomplish the latter.) We note, however, that the 8H sequence does have a structure similar to the CP sequence. Figure 8 shows the simulated effectiveness of 8H as compared to CP and UDD. We have selected � ¼ 1 ns [from Fig. 7(a)], so one iteration of the sequence requires 8 ns. Because this sequence is specifically designed to account for the errors particular to QuDOS, the performance
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